CEKLİ, S. And AKMAN, A. 2024. A high speed pipelined radix-16 Booth multiplier architecture for FPGA implementation. AEU - International Journal of Electronics and Communications , vol.185 .

CEKLİ, S., & AKMAN, A., (2024). A high speed pipelined radix-16 Booth multiplier architecture for FPGA implementation. AEU - International Journal of Electronics and Communications , vol.185.

CEKLİ, SERAP, And ALİ AKMAN. "A high speed pipelined radix-16 Booth multiplier architecture for FPGA implementation," AEU - International Journal of Electronics and Communications , vol.185, 2024

CEKLİ, SERAP And AKMAN, ALİ. "A high speed pipelined radix-16 Booth multiplier architecture for FPGA implementation." AEU - International Journal of Electronics and Communications , vol.185, 2024

CEKLİ, S. And AKMAN, A. (2024) . "A high speed pipelined radix-16 Booth multiplier architecture for FPGA implementation." AEU - International Journal of Electronics and Communications , vol.185.

@article{article, author={SERAP CEKLİ And author={ALİ AKMAN}, title={A high speed pipelined radix-16 Booth multiplier architecture for FPGA implementation}, journal={AEU - International Journal of Electronics and Communications}, year=2024}